The present invention generally relates to H-bridge transmitters.
FIG. 1 shows a conventional H-bridge transmitter. While H-bridge transmitters can be used in a plurality of driver applications, H-bridge operation is explained below using a low voltage DC electric motor application.
In the figure, conventional H-bridge transmitter 100 includes an H-bridge 102, an upper reference voltage source 104 and a lower reference voltage source 106. H-bridge 102 includes a Field Effect Transistor (FET) 108, a FET 110, a FET 112 and a FET 114. FET 108 is an NMOS FET, FET 110 is an NMOS FET, FET 112 is a PMOS FET and FET 114 is a PMOS FET.
As shown in the figure, FET 108 is arranged to be the upper left leg of H-bridge 102, whereas FET 110 is arranged to be the upper right leg of H-bridge 102. FET 112 is arranged to be the lower left leg of H-bridge 102, whereas FET 114 is arranged to be the lower right leg of H-bridge 102.
An input signal 116 drives the gate FET 108 and an input signal 118 drives the gate of FET 110. An input signal 120 drives the gate of FET 112 and an input signal 122 drives the gate FET 114. An output terminal 124 and an output terminal 126 are arranged as the transmitter outputs of H-bridge 102. A transmission load 128, as applied across output terminal 124 and output terminal 126, represents the load which H-bridge transmitter 100 drives.
Upper reference voltage source 104 and a lower reference voltage source 106 set the voltage swing limits between output terminals 124 and 126, and thus to transmission load 128. The signal amplitude and polarity across transmission load 128 is set by input signals 116, 118, 120 and 122.
For purposes of discussion, consider the operation of H-bridge 102 for a conventional basic low voltage DC motor control. In a first state, input signals 116 and 122 actuate the gates of FETs 108 and 114, respectively, whereas input signals 118 and 120 do not actuate the gates of FETs 110 and 112, respectively. In this first state, the current would run from output terminal 124 through transmission load 128 to output terminal 126, such that the motor would turn in a first direction. In a second state, input signals 116 and 122 do not actuate the gates of FETs 108 and 114, respectively, whereas input signals 118 and 120 actuate the gates of FETs 110 and 112, respectively. In this second state, the current would run from output terminal 126 through transmission load 128 to output terminal 124, such that the motor would turn in a second direction, opposite ID the first direction.
However, for high DC voltage applications, the CMOS based H-bridge implementation described above presents a challenge in supporting the necessary voltage swings without transistor damage.
What is needed is an H-bridge transmitter utilizing CMOS logic, but where the design supports the output drive voltages conventionally supported only by the conventional higher voltage semiconductor technologies such as bipolar.